> For the complete documentation index, see [llms.txt](https://mujoseph.gitbook.io/mujoseph-docs/llms.txt). Markdown versions of documentation pages are available by appending `.md` to page URLs; this page is available as [Markdown](https://mujoseph.gitbook.io/mujoseph-docs/emma-mk1-drsstc/drsstc_driver-firmware-overview/tim2-open-loop-switching-frequency-and-lead-time.md). # TIM2: Open-Loop Switching Frequency and Lead Time ## Role TIM2 determines the initial/open-loop switching frequency of the inverter at the start of each PRF cycle, as well as injecting the desired lead time into the drive signals. ## General Configuration TIM2 is configured as a down-counting slave timer, operating in reset mode. The reset trigger is *ITR10*, which maps to the HRTIM `hrtim_out_sync2` output signal. [Recall](/mujoseph-docs/emma-mk1-drsstc/drsstc_driver-firmware-overview/high-resolution-timer-hrtim/tima-resonant-cycle-timing-reference.md#synchronization-with-tim2) that `hrtim_output_sync2` pulse is generated on the HRTIM TIMA reset. Therefore, TIM2 is synchronized to [TIMA](/mujoseph-docs/emma-mk1-drsstc/drsstc_driver-firmware-overview/high-resolution-timer-hrtim/tima-resonant-cycle-timing-reference.md). ## Open-Loop Switching Frequency Seed and Lead Time Injection TIM2 is configured to produce a TRGO (Internal Trigger Output) pulse on a Compare 1 match, as can be seen below:

TIM2_CR2.MMS=0011b: TRGO pulse generated on
Compare 1 match (CC1IF=1).
(Source: STM32G474RE reference manual)

When the *DRSSTC\_Driver* starts a burst, the auto-reload register (ARR) is loaded with the period of the [desired starting/open-loop frequency](/mujoseph-docs/emma-mk1-drsstc/drsstc_driver-firmware-overview/serial-interface.md#start-frequency). The Compare 1 register (CCR1) is loaded with the [desired lead time](/mujoseph-docs/emma-mk1-drsstc/drsstc_driver-firmware-overview/serial-interface.md#lead-time) for the H-bridge drive signals. Once TIM2 is started, it will count down to zero and roll-over. As it passes the Compare 1 value, it will generate the TRGO pulse "early" (i.e., lead the switching period). If no lead time is desired, the TRGO pulse is simply generated on TIM2 reset. The TIM2 TRGO signal is connected to [EEV2](/mujoseph-docs/emma-mk1-drsstc/drsstc_driver-firmware-overview/high-resolution-timer-hrtim/external-event-eev-configuration.md#eev2-tim2-trgo-output) of the HRTIM peripheral. EEV2, alongside [EEV6](/mujoseph-docs/emma-mk1-drsstc/drsstc_driver-firmware-overview/high-resolution-timer-hrtim/external-event-eev-configuration.md#eev6-zero-crossing-detection-zcd-feedback-signal) (ZCD), serves as the set and reset source for the H-bridge drive signals [TB1, TB2](/mujoseph-docs/emma-mk1-drsstc/drsstc_driver-firmware-overview/high-resolution-timer-hrtim/timb-half-bridge-1-driver.md#timb-outputs-tb1-and-tb2-roles), [TC1, and TC2](/mujoseph-docs/emma-mk1-drsstc/drsstc_driver-firmware-overview/high-resolution-timer-hrtim/timc-half-bridge-2-driver.md#timc-outputs-tc1-and-tc2-roles). The H-bridge drive signals therefore switch states (i.e., commutate the H-bridge) on each EEV2 or EEV6 invocation. It's important to note that the period of TIM2 will ultimately converge to the true resonant period of the system since the ARR register is updated with the [TIME Capture 1](/mujoseph-docs/emma-mk1-drsstc/drsstc_driver-firmware-overview/high-resolution-timer-hrtim/time-resonant-frequency-capture.md#time-capture-1-role) register value via a [DMA2 CH1](/mujoseph-docs/emma-mk1-drsstc/drsstc_driver-firmware-overview/dma-configuration.md#dma2-channel-2-role) transfer (which is triggered by the TIME Capture 1 event itself). Thus, once the feedback loop is closed, EEV2 and EEV6 events will invoke at the same time, preventing the H-bridge commutation frequency from dithering back and forth. TIM2 serves as the initial source of the H-bridge switching frequency during the open-loop period at the start of each PRF burst cycle. Once feedback is received (i.e., EEV6 events are generated) and the loop is closed, the H-bridge switching frequency will match that of the [sampled feedback](/mujoseph-docs/emma-mk1-drsstc/hardware-overview/electrical-design/pcb-design/current-sense.md#zero-crossing-detection-zcd) of the primary current.